3

I'm trying to calculate the time elapsed between two events using the CCP on PIC18F4520. The events are triggered by two sensors that are on the ccp1 and ccp2 ports. I've assigned a prescalar of 8 to the T1CON and I'm using a crystal of 16 MHz. (Duration of one clock cycle is 2e-6 s) Since the maximum time I can measure before overflowing is just 0.13 seconds (65536 x 2e-6) and the event I'm measuring lasts for around 0.32 seconds I decided to count the number of times TMR1IF overflows and then multiply this by 65536 and add this to the captured CCPR1H:CCPR1L value.

However, I'm unable to count beyond one overflow of the TMR1IF register.

Hope someone knows why!

Below are the associated functions

void ccp_Init(void)
{
    TRISCbits.RC2 = 1;
    TRISCbits.RC1 = 1;
    CCP1CON = 0x05;
    CCP2CON = 0x05;
    T3CON = 0x00;
    PIE1bits.CCP1IE=1;
    PIE2bits.CCP2IE=1;
    T1CON = 0x30;
    TMR1H = 0;
    TMR1L = 0;
    PIR1bits.CCP1IF = 0;
    PIR2bits.CCP2IF = 0;
    PIR1bits.TMR1IF = 0;
}

int ccp_get(void)
{
    int count = 0;
    TMR1L = 0;
    TMR1H = 0;
    while(PIR2bits.CCP2IF == 0);
    T1CONbits.TMR1ON = 1;
    while (PIR1bits.CCP1IF == 0);
    {
        if (PIR1bits.TMR1IF == 1)
        {
            PIR1bits.TMR1IF = 0;
            TMR1L = 0;
            TMR1H = 0;
            count = count+1;
            T1CONbits.TMR1ON = 1;
        }
    }
    T1CONbits.TMR1ON = 0;
    return count;
}

From the above code int ccp_get() returns the number of times TMR1IF has overflowed and which isn't going beyond 1.

1 Answer 1

4

This loop looks suspicious, try removing the semicolon on first line:

while (PIR1bits.CCP1IF == 0);
{
    if (PIR1bits.TMR1IF == 1)
    {
        PIR1bits.TMR1IF = 0;
        TMR1L = 0;
        TMR1H = 0;
        count = count+1;
        T1CONbits.TMR1ON = 1;
    }
}

Overall, I suggest not to clear the timer counter. You could possibly miss some interrupts. Overflow happens after roll over, so the value would be already reset. See Datasheet on page 130 it says:

The TMR1 register pair (TMR1H:TMR1L) increments from 0000h to FFFFh and rolls over to 0000h. The Timer1 interrupt, if enabled, is generated on overflow, which is latched in interrupt flag bit, TMR1IF (PIR1<0>). This interrupt can be enabled or disabled by setting or clearing the Timer1 Interrupt Enable bit, TMR1IE (PIE1<0>).

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge that you have read and understand our privacy policy and code of conduct.

Not the answer you're looking for? Browse other questions tagged or ask your own question.